Interrupts are used to demand attention from the CPU. There are processor, hardware and software driven interrupts. The PC was designed as an interrupt driven system. Communications between the CPU, hardware and software occurs by means of of flags or interrupts which signal when a device or piece of software needs attention from the CPU. The PC is limited to 256 interrupts each of which receives a number. The Programmable Interrupt Controller (PIC) controls which interrupt gets the attention of the CPU and when. Basically, the lower numbered interrupts receive attention from the CPU before the higher numbered interrupts. The PC interrupts can be divided into six categories:

1. Processor Interrupts - Interrupts 00h to 07h are called by the processor directly, but can also be called from software using the INT instruction.

2. Hardware Interrupts - The hardware interrupts differ from all the software interrupts in that they have a direct channel to the processor thorough an Interrupt Request Line or IRQ. There are 16 IRQ lines on PC's (there are 8 IRQ lines on 8086/8088 based computers). These lines are hardwired on the motherboard and directly access the processor. The 8259 Programmable Interrupt Controller or PIC on the motherboard manages all the hardware interrupts. These controllers receive the requests from the various devices and pass the request along to the processor after converting them to specific instructions.

This allows a device or subsystem to work in the background until a particular event occurs that demands attention, like a keystroke or sound. An interrupt is created by asserting a logic level on an Interrupt Request (IRQ) line. This lines are accessed from any of the computers bus slots. An XT computer had 8 IRQ's, while the AT provides 16. These lines are controlled through the Programmable Interrupt Controller which in turn triggers the desired interrupt request to the CPU. Below is a listing of the hardware interrupts for a PC compatible computer:

An AT systems uses IRQ 2 on the motherboard so instead of leaving it empty, IRQ 9 now is wired to this IRQ, in effect, cascading, or redirecting, the IRQ. So IRQ 9 is now redirected to IRQ 2. When a interrupt request is made, the CPU saves the current state of registers in a small amount of memory called the stack, then the CPU is directed to the interrupt vector table, which is a list of program locations that represent each interrupt. Here, the CPU locates the interrupt handler for the desired interrupt request and executes the routine. Once the desires task is finished, the prior register contents are popped from the stack they are being held in and the CPU will continue with it's task it was performing prior to the interrupt.

3. Software Interrupts - These interrupts are generated by the ROM BIOS during the start up of the computer. These interrupts are used for general low-level services.

4. DOS Interrupts - These interrupts are available when DOS is running and provide additional routines for enhanced access to devices and other resources.

5. ROM Basic Interrupts - These interrupts are available when Basic is running.

6. General use Interrupts - These interrupts are available for use by other programs.

Interrupt Vector Table - When power is applied to a computer, the POST procedure creates a table of interrupt vectors that is 1024 bytes and contains a maximum of 256 interrupts. This table lists pointers to interrupt service routines. The interrupt vector table starts at memory location 0000:0000h and ends at 0000:03FCh. An interrupt vector is a 4-byte value of the form offset;segment, which represents the address of a routine to be called when the CPU receives an interrupt. The interrupt vector table is first initialized by the start up ROM but changes are made to it's contents as the first ROM Extensions and later the operating system files are loaded. The ability to update the contents of the interrupt vector table provides a means to easily expand operating system services.